virt_kvm/arch/x86_64/
regs.rs

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1// Copyright (c) Microsoft Corporation.
2// Licensed under the MIT License.
3
4use hvdef::HvX64RegisterName;
5
6#[derive(Debug)]
7// Field is stored solely for logging via debug, not actually dead.
8pub struct NoRegisterMapping(#[expect(dead_code)] HvX64RegisterName);
9
10/// Converts a register name to an msr.
11pub const fn register_to_msr(name: HvX64RegisterName) -> Result<u32, NoRegisterMapping> {
12    Ok(match name {
13        HvX64RegisterName::ApicBase => x86defs::X86X_MSR_APIC_BASE,
14        HvX64RegisterName::KernelGsBase => x86defs::X64_MSR_KERNEL_GS_BASE,
15        HvX64RegisterName::SysenterCs => x86defs::X86X_MSR_SYSENTER_CS,
16        HvX64RegisterName::SysenterEsp => x86defs::X86X_MSR_SYSENTER_ESP,
17        HvX64RegisterName::SysenterEip => x86defs::X86X_MSR_SYSENTER_EIP,
18        HvX64RegisterName::Star => x86defs::X86X_MSR_STAR,
19        HvX64RegisterName::Lstar => x86defs::X86X_MSR_LSTAR,
20        HvX64RegisterName::Cstar => x86defs::X86X_MSR_CSTAR,
21        HvX64RegisterName::Sfmask => x86defs::X86X_MSR_SFMASK,
22
23        HvX64RegisterName::Pat => x86defs::X86X_MSR_CR_PAT,
24        HvX64RegisterName::MsrMtrrDefType => x86defs::X86X_MSR_MTRR_DEF_TYPE,
25        HvX64RegisterName::MsrMtrrFix64k00000 => x86defs::X86X_MSR_MTRR_FIX64K_00000,
26        HvX64RegisterName::MsrMtrrFix16k80000 => x86defs::X86X_MSR_MTRR_FIX16K_80000,
27        HvX64RegisterName::MsrMtrrFix16kA0000 => x86defs::X86X_MSR_MTRR_FIX16K_A0000,
28        HvX64RegisterName::MsrMtrrFix4kC0000 => x86defs::X86X_MSR_MTRR_FIX4K_C0000,
29        HvX64RegisterName::MsrMtrrFix4kC8000 => x86defs::X86X_MSR_MTRR_FIX4K_C8000,
30        HvX64RegisterName::MsrMtrrFix4kD0000 => x86defs::X86X_MSR_MTRR_FIX4K_D0000,
31        HvX64RegisterName::MsrMtrrFix4kD8000 => x86defs::X86X_MSR_MTRR_FIX4K_D8000,
32        HvX64RegisterName::MsrMtrrFix4kE0000 => x86defs::X86X_MSR_MTRR_FIX4K_E0000,
33        HvX64RegisterName::MsrMtrrFix4kE8000 => x86defs::X86X_MSR_MTRR_FIX4K_E8000,
34        HvX64RegisterName::MsrMtrrFix4kF0000 => x86defs::X86X_MSR_MTRR_FIX4K_F0000,
35        HvX64RegisterName::MsrMtrrFix4kF8000 => x86defs::X86X_MSR_MTRR_FIX4K_F8000,
36
37        HvX64RegisterName::MsrMtrrPhysBase0 => x86defs::X86X_MSR_MTRR_PHYSBASE0,
38        HvX64RegisterName::MsrMtrrPhysMask0 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 1,
39        HvX64RegisterName::MsrMtrrPhysBase1 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 2,
40        HvX64RegisterName::MsrMtrrPhysMask1 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 3,
41        HvX64RegisterName::MsrMtrrPhysBase2 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 4,
42        HvX64RegisterName::MsrMtrrPhysMask2 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 5,
43        HvX64RegisterName::MsrMtrrPhysBase3 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 6,
44        HvX64RegisterName::MsrMtrrPhysMask3 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 7,
45        HvX64RegisterName::MsrMtrrPhysBase4 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 8,
46        HvX64RegisterName::MsrMtrrPhysMask4 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 9,
47        HvX64RegisterName::MsrMtrrPhysBase5 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 10,
48        HvX64RegisterName::MsrMtrrPhysMask5 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 11,
49        HvX64RegisterName::MsrMtrrPhysBase6 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 12,
50        HvX64RegisterName::MsrMtrrPhysMask6 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 13,
51        HvX64RegisterName::MsrMtrrPhysBase7 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 14,
52        HvX64RegisterName::MsrMtrrPhysMask7 => x86defs::X86X_MSR_MTRR_PHYSBASE0 + 15,
53
54        HvX64RegisterName::Tsc => x86defs::X86X_MSR_TSC,
55        HvX64RegisterName::TscAux => x86defs::X86X_MSR_TSC_AUX,
56
57        HvX64RegisterName::Xss => x86defs::X86X_MSR_XSS,
58        HvX64RegisterName::UCet => x86defs::X86X_MSR_U_CET,
59        HvX64RegisterName::SCet => x86defs::X86X_MSR_S_CET,
60        HvX64RegisterName::Pl0Ssp => x86defs::X86X_MSR_PL0_SSP,
61        HvX64RegisterName::Pl1Ssp => x86defs::X86X_MSR_PL1_SSP,
62        HvX64RegisterName::Pl2Ssp => x86defs::X86X_MSR_PL2_SSP,
63        HvX64RegisterName::Pl3Ssp => x86defs::X86X_MSR_PL3_SSP,
64        HvX64RegisterName::InterruptSspTableAddr => x86defs::X86X_MSR_INTERRUPT_SSP_TABLE_ADDR,
65
66        HvX64RegisterName::GuestOsId => hvdef::HV_X64_MSR_GUEST_OS_ID,
67        HvX64RegisterName::Hypercall => hvdef::HV_X64_MSR_HYPERCALL,
68        HvX64RegisterName::ReferenceTsc => hvdef::HV_X64_MSR_REFERENCE_TSC,
69        HvX64RegisterName::TimeRefCount => hvdef::HV_X64_MSR_TIME_REF_COUNT,
70
71        HvX64RegisterName::VpAssistPage => hvdef::HV_X64_MSR_VP_ASSIST_PAGE,
72
73        HvX64RegisterName::Sversion => hvdef::HV_X64_MSR_SVERSION,
74        HvX64RegisterName::Scontrol => hvdef::HV_X64_MSR_SCONTROL,
75        HvX64RegisterName::Sifp => hvdef::HV_X64_MSR_SIEFP,
76        HvX64RegisterName::Sipp => hvdef::HV_X64_MSR_SIMP,
77        HvX64RegisterName::Eom => hvdef::HV_X64_MSR_EOM,
78        HvX64RegisterName::Sint0 => hvdef::HV_X64_MSR_SINT0,
79        HvX64RegisterName::Sint1 => hvdef::HV_X64_MSR_SINT1,
80        HvX64RegisterName::Sint2 => hvdef::HV_X64_MSR_SINT2,
81        HvX64RegisterName::Sint3 => hvdef::HV_X64_MSR_SINT3,
82        HvX64RegisterName::Sint4 => hvdef::HV_X64_MSR_SINT4,
83        HvX64RegisterName::Sint5 => hvdef::HV_X64_MSR_SINT5,
84        HvX64RegisterName::Sint6 => hvdef::HV_X64_MSR_SINT6,
85        HvX64RegisterName::Sint7 => hvdef::HV_X64_MSR_SINT7,
86        HvX64RegisterName::Sint8 => hvdef::HV_X64_MSR_SINT8,
87        HvX64RegisterName::Sint9 => hvdef::HV_X64_MSR_SINT9,
88        HvX64RegisterName::Sint10 => hvdef::HV_X64_MSR_SINT10,
89        HvX64RegisterName::Sint11 => hvdef::HV_X64_MSR_SINT11,
90        HvX64RegisterName::Sint12 => hvdef::HV_X64_MSR_SINT12,
91        HvX64RegisterName::Sint13 => hvdef::HV_X64_MSR_SINT13,
92        HvX64RegisterName::Sint14 => hvdef::HV_X64_MSR_SINT14,
93        HvX64RegisterName::Sint15 => hvdef::HV_X64_MSR_SINT15,
94
95        HvX64RegisterName::GuestCrashP0 => hvdef::HV_X64_MSR_GUEST_CRASH_P0,
96        HvX64RegisterName::GuestCrashP1 => hvdef::HV_X64_MSR_GUEST_CRASH_P1,
97        HvX64RegisterName::GuestCrashP2 => hvdef::HV_X64_MSR_GUEST_CRASH_P2,
98        HvX64RegisterName::GuestCrashP3 => hvdef::HV_X64_MSR_GUEST_CRASH_P3,
99        HvX64RegisterName::GuestCrashP4 => hvdef::HV_X64_MSR_GUEST_CRASH_P4,
100        HvX64RegisterName::GuestCrashCtl => hvdef::HV_X64_MSR_GUEST_CRASH_CTL,
101
102        _ => return Err(NoRegisterMapping(name)),
103    })
104}
virt_kvm/arch/x86_64/regs.rs

virt_kvm/arch/x86_64/
regs.rs
