underhill_core/emuplat/
vga_proxy.rs1use std::ops::RangeInclusive;
5use std::sync::Arc;
6use virt_mshv_vtl::UhPartition;
7
8pub struct UhRegisterHostIoFastPath(pub Arc<UhPartition>);
9
10impl vga_proxy::RegisterHostIoPortFastPath for UhRegisterHostIoFastPath {
11 fn register(&self, range: RangeInclusive<u16>) -> Box<dyn Send> {
12 Box::new(self.0.register_host_io_port_fast_path(range))
13 }
14}
15
16pub struct GetProxyVgaPciCfgAccess(pub guest_emulation_transport::GuestEmulationTransportClient);
17
18#[async_trait::async_trait]
19impl vga_proxy::ProxyVgaPciCfgAccess for GetProxyVgaPciCfgAccess {
20 async fn vga_proxy_pci_read(&self, offset: u16) -> u32 {
21 let val = self.0.vga_proxy_pci_read(offset).await;
22 tracing::trace!(?val, "VGA proxy read result");
23 val
24 }
25
26 async fn vga_proxy_pci_write(&self, offset: u16, value: u32) {
27 self.0.vga_proxy_pci_write(offset, value).await
28 }
29}