debug_worker/gdb/targets/target_i8086/
mod.rs

1// Copyright (c) Microsoft Corporation.
2// Licensed under the MIT License.
3
4//! A minimal target for debugging 16-bit and 32-bit early boot code
5
6use super::ArchError;
7use super::TargetArch;
8use crate::gdb::arch::x86::reg::X86CoreRegs;
9use crate::gdb::arch::x86::reg::X86SegmentRegs;
10use vmm_core_defs::debug_rpc::DebuggerVpState;
11
12impl TargetArch for crate::gdb::arch::x86::I8086 {
13    type Address = u32;
14
15    fn register(
16        _state: &DebuggerVpState,
17        _reg_id: Self::RegId,
18        _buf: &mut [u8],
19    ) -> Result<usize, ArchError> {
20        Err(ArchError)
21    }
22
23    fn registers(state: &DebuggerVpState, regs: &mut Self::Registers) -> Result<(), ArchError> {
24        let DebuggerVpState::X86_64(state) = state else {
25            return Err(ArchError);
26        };
27        let [eax, ecx, edx, ebx, esp, ebp, esi, edi] = {
28            let [rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, ..] = state.gp;
29            [
30                rax as u32, rcx as u32, rdx as u32, rbx as u32, rsp as u32, rbp as u32, rsi as u32,
31                rdi as u32,
32            ]
33        };
34
35        *regs = X86CoreRegs {
36            eax,
37            ecx,
38            edx,
39            ebx,
40            esp,
41            ebp,
42            esi,
43            edi,
44            eflags: state
45                .rflags
46                .try_into()
47                .expect("high 32 bits of rflags are non-zero"),
48            eip: state.rip as u32,
49            segments: X86SegmentRegs {
50                cs: state.cs.selector.into(),
51                ss: state.ss.selector.into(),
52                ds: state.ds.selector.into(),
53                es: state.es.selector.into(),
54                fs: state.fs.selector.into(),
55                gs: state.gs.selector.into(),
56            },
57
58            // TODO from xsave
59            st: Default::default(),
60            fpu: Default::default(),
61            xmm: [0; 8],
62            mxcsr: 0,
63        };
64
65        Ok(())
66    }
67
68    fn update_registers(
69        _state: &mut DebuggerVpState,
70        _regs: &Self::Registers,
71    ) -> Result<(), ArchError> {
72        Err(ArchError)
73    }
74
75    fn update_register(
76        _state: &mut DebuggerVpState,
77        _reg_id: Self::RegId,
78        _val: &[u8],
79    ) -> Result<(), ArchError> {
80        Err(ArchError)
81    }
82}
debug_worker/gdb/targets/target_i8086/mod.rs

debug_worker/gdb/targets/target_i8086/
mod.rs
