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openhcl_boot/arch/x86_64/
mod.rs

1// Copyright (c) Microsoft Corporation.
2// Licensed under the MIT License.
3
4#![cfg(target_arch = "x86_64")]
5
6//! x86_64 architecture-specific implementations.
7
8mod address_space;
9pub mod hypercall;
10mod memory;
11pub mod snp;
12pub mod tdx;
13mod vp;
14mod vsm;
15
16use crate::host_params::shim_params::IsolationType;
17#[cfg(feature = "cvm_boot_log")]
18use crate::host_params::shim_params::ShimParams;
19pub use address_space::TdxHypercallPage;
20pub use memory::setup_vtl2_memory;
21pub use memory::verify_imported_regions_hash;
22use safe_intrinsics::cpuid;
23pub use vp::setup_vtl2_vp;
24pub use vsm::get_isolation_type;
25use x86defs::cpuid::CpuidFunction;
26
27pub fn physical_address_bits(isolation: IsolationType) -> u8 {
28    if isolation.is_hardware_isolated() {
29        unimplemented!("can't trust host cpuid");
30    }
31    const DEFAULT_PHYSICAL_ADDRESS_SIZE: u8 = 32;
32
33    let max_extended = {
34        let result = cpuid(CpuidFunction::ExtendedMaxFunction.0, 0);
35        result.eax
36    };
37    if max_extended >= CpuidFunction::ExtendedAddressSpaceSizes.0 {
38        let result = cpuid(CpuidFunction::ExtendedAddressSpaceSizes.0, 0);
39        (result.eax & 0xFF) as u8
40    } else {
41        DEFAULT_PHYSICAL_ADDRESS_SIZE
42    }
43}
44
45/// Perform any architecture and isolation-specific initialization required
46/// before the boot shim can use serial logging. For SNP, this sets up the
47/// GHCB page so that IOIO exits can be used for port I/O.
48#[cfg(feature = "cvm_boot_log")]
49pub fn initialize_serial_io(p: &ShimParams) {
50    if p.isolation_type == IsolationType::Snp {
51        snp::Ghcb::initialize();
52    }
53}
54
55/// Tear down architecture and isolation-specific state set up by
56/// [`initialize_serial_io`]. For SNP, this restores the GHCB page to its
57/// original private/accepted state.
58#[cfg(feature = "cvm_boot_log")]
59pub fn uninitialize_serial_io(p: &ShimParams) {
60    if p.isolation_type == IsolationType::Snp {
61        snp::Ghcb::uninitialize();
62    }
63}
64
65// Entry point.
66#[cfg(minimal_rt)]
67core::arch::global_asm! {
68    include_str!("entry.S"),
69    relocate = sym minimal_rt::reloc::relocate,
70    start = sym crate::rt::start,
71    stack = sym crate::rt::STACK,
72    STACK_COOKIE = const crate::rt::STACK_COOKIE,
73    STACK_SIZE = const crate::rt::STACK_SIZE,
74}