debug_worker/gdb/arch/x86/reg/
id.rs

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1// Copyright (c) Microsoft Corporation.
2// Licensed under the MIT License.
3
4use core::num::NonZeroUsize;
5use gdbstub::arch::RegId;
6
7#[derive(Debug, Clone, Copy)]
8pub enum X87FpuInternalRegId {
9    Fctrl,
10    Fstat,
11    Ftag,
12    Fiseg,
13    Fioff,
14    Foseg,
15    Fooff,
16    Fop,
17}
18
19impl X87FpuInternalRegId {
20    fn from_u8(val: u8) -> Option<Self> {
21        use self::X87FpuInternalRegId::*;
22
23        let r = match val {
24            0 => Fctrl,
25            1 => Fstat,
26            2 => Ftag,
27            3 => Fiseg,
28            4 => Fioff,
29            5 => Foseg,
30            6 => Fooff,
31            7 => Fop,
32            _ => return None,
33        };
34        Some(r)
35    }
36}
37
38#[derive(Debug, Clone, Copy)]
39pub enum X86SegmentRegId {
40    CS,
41    SS,
42    DS,
43    ES,
44    FS,
45    GS,
46}
47
48impl X86SegmentRegId {
49    fn from_u8(val: u8) -> Option<Self> {
50        use self::X86SegmentRegId::*;
51
52        let r = match val {
53            0 => CS,
54            1 => SS,
55            2 => DS,
56            3 => ES,
57            4 => FS,
58            5 => GS,
59            _ => return None,
60        };
61        Some(r)
62    }
63}
64
65#[derive(Debug, Clone, Copy)]
66#[non_exhaustive]
67pub enum X86_64CoreRegId {
68    /// RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, r8-r15
69    Gpr(u8),
70    Rip,
71    Eflags,
72    Segment(X86SegmentRegId),
73    FsBase,
74    GsBase,
75    KernelGsBase,
76    Cr0,
77    Cr2,
78    Cr3,
79    Cr4,
80    Cr8,
81    Efer,
82    St(u8),
83    Fpu(X87FpuInternalRegId),
84    Xmm(u8),
85    Mxcsr,
86}
87
88impl RegId for X86_64CoreRegId {
89    fn from_raw_id(id: usize) -> Option<(Self, Option<NonZeroUsize>)> {
90        use self::X86_64CoreRegId::*;
91
92        let (r, sz): (X86_64CoreRegId, usize) = match id {
93            0..=15 => (Gpr(id as u8), 8),
94            16 => (Rip, 8),
95            17 => (Eflags, 4),
96            18..=23 => (Segment(X86SegmentRegId::from_u8(id as u8 - 18)?), 4),
97
98            24 => (FsBase, 8),
99            25 => (GsBase, 8),
100            26 => (KernelGsBase, 8),
101            27 => (Cr0, 8),
102            28 => (Cr2, 8),
103            29 => (Cr3, 8),
104            30 => (Cr4, 8),
105            31 => (Cr8, 8),
106            32 => (Efer, 8),
107
108            33..=40 => (St(id as u8 - 33), 10),
109            41..=48 => (Fpu(X87FpuInternalRegId::from_u8(id as u8 - 41)?), 4),
110            49..=64 => (Xmm(id as u8 - 49), 16),
111            65 => (Mxcsr, 4),
112            _ => return None,
113        };
114
115        Some((r, Some(NonZeroUsize::new(sz)?)))
116    }
117}
debug_worker/gdb/arch/x86/reg/id.rs

debug_worker/gdb/arch/x86/reg/
id.rs
