pub struct GenericPcieRootComplex { /* private fields */ }Expand description
A generic PCI Express root complex emulator.
Implementations§
Source§impl GenericPcieRootComplex
impl GenericPcieRootComplex
Sourcepub fn builder<'a>(
register_mmio: &'a mut dyn RegisterMmioIntercept,
bus_range: RangeInclusive<u8>,
ecam_range: MemoryRange,
) -> GenericPcieRootComplexBuilder<'a>
pub fn builder<'a>( register_mmio: &'a mut dyn RegisterMmioIntercept, bus_range: RangeInclusive<u8>, ecam_range: MemoryRange, ) -> GenericPcieRootComplexBuilder<'a>
Returns a builder for constructing a new GenericPcieRootComplex.
Sourcepub fn add_pcie_device(
&mut self,
port_devfn: u8,
name: impl AsRef<str>,
dev: Box<dyn GenericPciBusDevice>,
) -> Result<(), Arc<str>>
pub fn add_pcie_device( &mut self, port_devfn: u8, name: impl AsRef<str>, dev: Box<dyn GenericPciBusDevice>, ) -> Result<(), Arc<str>>
Attach the provided GenericPciBusDevice to the port identified by
its devfn (device << 3 | function).
Sourcepub fn downstream_ports(&self) -> Vec<DownstreamPortInfo>
pub fn downstream_ports(&self) -> Vec<DownstreamPortInfo>
Enumerate the downstream ports of the root complex.
Sourcepub fn hotplug_add_device(
&mut self,
port_name: &str,
device_name: &str,
device: Box<dyn GenericPciBusDevice>,
) -> Result<()>
pub fn hotplug_add_device( &mut self, port_name: &str, device_name: &str, device: Box<dyn GenericPciBusDevice>, ) -> Result<()>
Hot-add a device to a named port.
Sourcepub fn hotplug_remove_device(&mut self, port_name: &str) -> Result<()>
pub fn hotplug_remove_device(&mut self, port_name: &str) -> Result<()>
Hot-remove the device from a named port.
Sourcepub fn add_rciep(
&mut self,
devfn: u8,
name: impl Into<Arc<str>>,
dev: Box<dyn GenericPciBusDevice>,
) -> Result<(), Arc<str>>
pub fn add_rciep( &mut self, devfn: u8, name: impl Into<Arc<str>>, dev: Box<dyn GenericPciBusDevice>, ) -> Result<(), Arc<str>>
Attach a Root Complex Integrated Endpoint (RCiEP) at the given devfn (device << 3 | function) on the start bus of this root complex.
RCiEPs are Type 0 PCI functions that appear directly on the start bus alongside root ports (e.g., an AMD IOMMU at device 0). They do not sit behind a downstream port and have a fixed BDF.
Most RCiEPs should be registered at function 0. Config space
accesses to other functions of the same device will be forwarded
to the function 0 device via
pci_cfg_read_with_routing,
whose default implementation returns all-1s (no device present).
A multi-function RCiEP should override pci_cfg_read_with_routing
and pci_cfg_write_with_routing to handle non-zero functions.