Struct MmioRegister 

#[repr(transparent)]
pub struct MmioRegister(pub u16);

MMIO register offsets for the Intel VT-d IOMMU.

64-bit registers have separate _HI variants for the upper DWORD (base + 4), enabling flat match dispatch without nested fallbacks.

Tuple Fields

0: u16

Implementations

impl MmioRegister

pub const VER: MmioRegister

Version Register (32-bit, RO). §10.4.1.

pub const CAP: MmioRegister

Capability Register — lo DWORD (64-bit, RO). §10.4.2.

pub const CAP_HI: MmioRegister

Capability Register — hi DWORD.

pub const ECAP: MmioRegister

Extended Capability Register — lo DWORD (64-bit, RO). §10.4.3.

pub const ECAP_HI: MmioRegister

Extended Capability Register — hi DWORD.

pub const GCMD: MmioRegister

Global Command Register (32-bit, WO). §10.4.4.

pub const GSTS: MmioRegister

Global Status Register (32-bit, RO). §10.4.5.

pub const RTADDR: MmioRegister

Root Table Address Register — lo DWORD (64-bit, RW). §10.4.6.

pub const RTADDR_HI: MmioRegister

Root Table Address Register — hi DWORD.

pub const CCMD: MmioRegister

Context Command Register — lo DWORD (64-bit, RW). §10.4.7.

pub const CCMD_HI: MmioRegister

Context Command Register — hi DWORD.

pub const FSTS: MmioRegister

Fault Status Register (32-bit, RW1C). §10.4.9.

pub const FECTL: MmioRegister

Fault Event Control Register (32-bit, RW). §10.4.10.

pub const FEDATA: MmioRegister

Fault Event Data Register (32-bit, RW). §10.4.11.

pub const FEADDR: MmioRegister

Fault Event Address Register (32-bit, RW). §10.4.12.

pub const FEUADDR: MmioRegister

Fault Event Upper Address Register (32-bit, RW). §10.4.13.

pub const IQH: MmioRegister

Invalidation Queue Head Register — lo DWORD (64-bit, RO). §10.4.17.

pub const IQH_HI: MmioRegister

Invalidation Queue Head Register — hi DWORD.

pub const IQT: MmioRegister

Invalidation Queue Tail Register — lo DWORD (64-bit, RW). §10.4.18.

pub const IQT_HI: MmioRegister

Invalidation Queue Tail Register — hi DWORD.

pub const IQA: MmioRegister

Invalidation Queue Address Register — lo DWORD (64-bit, RW). §10.4.19.

pub const IQA_HI: MmioRegister

Invalidation Queue Address Register — hi DWORD.

pub const ICS: MmioRegister

Invalidation Completion Status Register (32-bit, RW1C). §10.4.20.

pub const IECTL: MmioRegister

Invalidation Event Control Register (32-bit, RW). §10.4.21.

pub const IEDATA: MmioRegister

Invalidation Event Data Register (32-bit, RW). §10.4.22.

pub const IEADDR: MmioRegister

Invalidation Event Address Register (32-bit, RW). §10.4.23.

pub const IEUADDR: MmioRegister

Invalidation Event Upper Address Register (32-bit, RW). §10.4.24.

pub const IRTA: MmioRegister

Interrupt Remapping Table Address Register — lo DWORD (64-bit, RW). §10.4.29.

pub const IRTA_HI: MmioRegister

Interrupt Remapping Table Address Register — hi DWORD.

pub const IVA: MmioRegister

Invalidate Address Register — lo DWORD (64-bit, RW). §10.4.15.

pub const IVA_HI: MmioRegister

Invalidate Address Register — hi DWORD.

pub const IOTLB: MmioRegister

IOTLB Invalidate Register — lo DWORD (64-bit, RW). §10.4.16.

pub const IOTLB_HI: MmioRegister

IOTLB Invalidate Register — hi DWORD.

pub const FRCD_DW0: MmioRegister

Fault Recording Register DWORD 0 (FrcdLo lo). §10.4.14.

pub const FRCD_DW1: MmioRegister

Fault Recording Register DWORD 1 (FrcdLo hi).

pub const FRCD_DW2: MmioRegister

Fault Recording Register DWORD 2 (FrcdHi lo).

pub const FRCD_DW3: MmioRegister

Fault Recording Register DWORD 3 (FrcdHi hi, contains F bit).

Trait Implementations

impl Clone for MmioRegister

fn clone(&self) -> MmioRegister

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for MmioRegister

fn fmt(&self, fmt: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Hash for MmioRegister

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl Inspect for MmioRegister

fn inspect(&self, req: Request<'_>)

Inspects the object.

impl Ord for MmioRegister

fn cmp(&self, other: &MmioRegister) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized,

Restrict a value to a certain interval.

impl PartialEq for MmioRegister

fn eq(&self, other: &MmioRegister) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for MmioRegister

fn partial_cmp(&self, other: &MmioRegister) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for MmioRegister

impl Eq for MmioRegister

impl StructuralPartialEq for MmioRegister