Struct IqaReg 

pub struct IqaReg(/* private fields */);

Invalidation Queue Address Register (MMIO offset 0x090, 64-bit, RW). §11.4.9.3.

Holds the base address and size of the invalidation queue. Only writable when QIE=0.

Implementations

impl IqaReg

pub const fn new() -> Self

Creates a new default initialized bitfield.

pub const fn from_bits(bits: u64) -> Self

Convert from bits.

pub const fn into_bits(self) -> u64

Convert into bits.

pub const fn qs(&self) -> u8

Queue size in 4KB pages = 2^QS, independent of descriptor width.

Bits: 0..3

pub const fn with_qs_checked(self, value: u8) -> Result<Self, ()>

Queue size in 4KB pages = 2^QS, independent of descriptor width.

Bits: 0..3

pub const fn with_qs(self, value: u8) -> Self

Queue size in 4KB pages = 2^QS, independent of descriptor width.

Bits: 0..3

pub const fn set_qs(&mut self, value: u8)

Queue size in 4KB pages = 2^QS, independent of descriptor width.

Bits: 0..3

pub const fn set_qs_checked(&mut self, value: u8) -> Result<(), ()>

Queue size in 4KB pages = 2^QS, independent of descriptor width.

Bits: 0..3

pub const fn dw(&self) -> bool

Descriptor width (bit 11): 0=128-bit, 1=256-bit. 256-bit descriptors require scalable-mode or abort-DMA capability.

Bits: 11..12

pub const fn with_dw_checked(self, value: bool) -> Result<Self, ()>

Descriptor width (bit 11): 0=128-bit, 1=256-bit. 256-bit descriptors require scalable-mode or abort-DMA capability.

Bits: 11..12

pub const fn with_dw(self, value: bool) -> Self

Descriptor width (bit 11): 0=128-bit, 1=256-bit. 256-bit descriptors require scalable-mode or abort-DMA capability.

Bits: 11..12

pub const fn set_dw(&mut self, value: bool)

Descriptor width (bit 11): 0=128-bit, 1=256-bit. 256-bit descriptors require scalable-mode or abort-DMA capability.

Bits: 11..12

pub const fn set_dw_checked(&mut self, value: bool) -> Result<(), ()>

Descriptor width (bit 11): 0=128-bit, 1=256-bit. 256-bit descriptors require scalable-mode or abort-DMA capability.

Bits: 11..12

pub const fn iqa(&self) -> u64

Queue base address, bits [63:12]. 4KB-aligned.

Bits: 12..64

pub const fn with_iqa_checked(self, value: u64) -> Result<Self, ()>

Queue base address, bits [63:12]. 4KB-aligned.

Bits: 12..64

pub const fn with_iqa(self, value: u64) -> Self

Queue base address, bits [63:12]. 4KB-aligned.

Bits: 12..64

pub const fn set_iqa(&mut self, value: u64)

Queue base address, bits [63:12]. 4KB-aligned.

Bits: 12..64

pub const fn set_iqa_checked(&mut self, value: u64) -> Result<(), ()>

Queue base address, bits [63:12]. 4KB-aligned.

Bits: 12..64

impl IqaReg

pub fn queue_base_address(&self) -> u64

Get the queue base physical address.

pub fn queue_size_bytes(&self) -> u64

Get the queue size in bytes: 4096 * 2^QS, for either descriptor width.

Trait Implementations

impl Clone for IqaReg

fn clone(&self) -> IqaReg

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for IqaReg

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for IqaReg

fn default() -> Self

Returns the “default value” for a type.

impl From<IqaReg> for u64

fn from(v: IqaReg) -> u64

Converts to this type from the input type.

impl From<u64> for IqaReg

fn from(v: u64) -> Self

Converts to this type from the input type.

impl Inspect for IqaReg

fn inspect(&self, req: Request<'_>)

Inspects the object.

impl Copy for IqaReg