pub struct SlPte(/* private fields */);Expand description
A 64-bit second-level page table entry (PTE or PDE).
EPT-like format used by Intel VT-d for DMA address translation. Permissions (R/W) are AND-accumulated across all levels per §3.7.1.
Implementations§
Source§impl SlPte
impl SlPte
Sourcepub const fn r(&self) -> bool
pub const fn r(&self) -> bool
Read permission — 1 = DMA reads allowed through this entry.
Bits: 0..1
Sourcepub const fn with_r_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_r_checked(self, value: bool) -> Result<Self, ()>
Read permission — 1 = DMA reads allowed through this entry.
Bits: 0..1
Sourcepub const fn with_r(self, value: bool) -> Self
pub const fn with_r(self, value: bool) -> Self
Read permission — 1 = DMA reads allowed through this entry.
Bits: 0..1
Sourcepub const fn set_r(&mut self, value: bool)
pub const fn set_r(&mut self, value: bool)
Read permission — 1 = DMA reads allowed through this entry.
Bits: 0..1
Sourcepub const fn set_r_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_r_checked(&mut self, value: bool) -> Result<(), ()>
Read permission — 1 = DMA reads allowed through this entry.
Bits: 0..1
Sourcepub const fn w(&self) -> bool
pub const fn w(&self) -> bool
Write permission — 1 = DMA writes allowed through this entry.
Bits: 1..2
Sourcepub const fn with_w_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_w_checked(self, value: bool) -> Result<Self, ()>
Write permission — 1 = DMA writes allowed through this entry.
Bits: 1..2
Sourcepub const fn with_w(self, value: bool) -> Self
pub const fn with_w(self, value: bool) -> Self
Write permission — 1 = DMA writes allowed through this entry.
Bits: 1..2
Sourcepub const fn set_w(&mut self, value: bool)
pub const fn set_w(&mut self, value: bool)
Write permission — 1 = DMA writes allowed through this entry.
Bits: 1..2
Sourcepub const fn set_w_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_w_checked(&mut self, value: bool) -> Result<(), ()>
Write permission — 1 = DMA writes allowed through this entry.
Bits: 1..2
Sourcepub const fn x(&self) -> bool
pub const fn x(&self) -> bool
EPT execute bit; ignored in VT-d second-stage entries.
Bits: 2..3
Sourcepub const fn with_x_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_x_checked(self, value: bool) -> Result<Self, ()>
EPT execute bit; ignored in VT-d second-stage entries.
Bits: 2..3
Sourcepub const fn with_x(self, value: bool) -> Self
pub const fn with_x(self, value: bool) -> Self
EPT execute bit; ignored in VT-d second-stage entries.
Bits: 2..3
Sourcepub const fn set_x(&mut self, value: bool)
pub const fn set_x(&mut self, value: bool)
EPT execute bit; ignored in VT-d second-stage entries.
Bits: 2..3
Sourcepub const fn set_x_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_x_checked(&mut self, value: bool) -> Result<(), ()>
EPT execute bit; ignored in VT-d second-stage entries.
Bits: 2..3
Sourcepub const fn ps(&self) -> bool
pub const fn ps(&self) -> bool
Page Size — 1 = this is a leaf entry for a large page. Valid at level 3 (1GB) and level 2 (2MB). Must be 0 at level 4.
Bits: 7..8
Sourcepub const fn with_ps_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_ps_checked(self, value: bool) -> Result<Self, ()>
Page Size — 1 = this is a leaf entry for a large page. Valid at level 3 (1GB) and level 2 (2MB). Must be 0 at level 4.
Bits: 7..8
Sourcepub const fn with_ps(self, value: bool) -> Self
pub const fn with_ps(self, value: bool) -> Self
Page Size — 1 = this is a leaf entry for a large page. Valid at level 3 (1GB) and level 2 (2MB). Must be 0 at level 4.
Bits: 7..8
Sourcepub const fn set_ps(&mut self, value: bool)
pub const fn set_ps(&mut self, value: bool)
Page Size — 1 = this is a leaf entry for a large page. Valid at level 3 (1GB) and level 2 (2MB). Must be 0 at level 4.
Bits: 7..8
Sourcepub const fn set_ps_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_ps_checked(&mut self, value: bool) -> Result<(), ()>
Page Size — 1 = this is a leaf entry for a large page. Valid at level 3 (1GB) and level 2 (2MB). Must be 0 at level 4.
Bits: 7..8
Sourcepub const fn a(&self) -> bool
pub const fn a(&self) -> bool
Accessed (bit 8): hardware sets this when using the entry for translation. Enabled by Second Stage Access/Dirty bit Enable (SSADE) in the referencing scalable-mode PASID-table entry; otherwise ignored.
Bits: 8..9
Sourcepub const fn with_a_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_a_checked(self, value: bool) -> Result<Self, ()>
Accessed (bit 8): hardware sets this when using the entry for translation. Enabled by Second Stage Access/Dirty bit Enable (SSADE) in the referencing scalable-mode PASID-table entry; otherwise ignored.
Bits: 8..9
Sourcepub const fn with_a(self, value: bool) -> Self
pub const fn with_a(self, value: bool) -> Self
Accessed (bit 8): hardware sets this when using the entry for translation. Enabled by Second Stage Access/Dirty bit Enable (SSADE) in the referencing scalable-mode PASID-table entry; otherwise ignored.
Bits: 8..9
Sourcepub const fn set_a(&mut self, value: bool)
pub const fn set_a(&mut self, value: bool)
Accessed (bit 8): hardware sets this when using the entry for translation. Enabled by Second Stage Access/Dirty bit Enable (SSADE) in the referencing scalable-mode PASID-table entry; otherwise ignored.
Bits: 8..9
Sourcepub const fn set_a_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_a_checked(&mut self, value: bool) -> Result<(), ()>
Accessed (bit 8): hardware sets this when using the entry for translation. Enabled by Second Stage Access/Dirty bit Enable (SSADE) in the referencing scalable-mode PASID-table entry; otherwise ignored.
Bits: 8..9
Sourcepub const fn d(&self) -> bool
pub const fn d(&self) -> bool
Dirty (bit 9): hardware sets this on the leaf entry for a DMA write. Ignored in non-leaf entries or when the PASID-table SSADE field is clear.
Bits: 9..10
Sourcepub const fn with_d_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_d_checked(self, value: bool) -> Result<Self, ()>
Dirty (bit 9): hardware sets this on the leaf entry for a DMA write. Ignored in non-leaf entries or when the PASID-table SSADE field is clear.
Bits: 9..10
Sourcepub const fn with_d(self, value: bool) -> Self
pub const fn with_d(self, value: bool) -> Self
Dirty (bit 9): hardware sets this on the leaf entry for a DMA write. Ignored in non-leaf entries or when the PASID-table SSADE field is clear.
Bits: 9..10
Sourcepub const fn set_d(&mut self, value: bool)
pub const fn set_d(&mut self, value: bool)
Dirty (bit 9): hardware sets this on the leaf entry for a DMA write. Ignored in non-leaf entries or when the PASID-table SSADE field is clear.
Bits: 9..10
Sourcepub const fn set_d_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_d_checked(&mut self, value: bool) -> Result<(), ()>
Dirty (bit 9): hardware sets this on the leaf entry for a DMA write. Ignored in non-leaf entries or when the PASID-table SSADE field is clear.
Bits: 9..10
Sourcepub const fn with_snp_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_snp_checked(self, value: bool) -> Result<Self, ()>
Snoop behavior (bit 11, ignored by emulator).
Bits: 11..12
Sourcepub const fn with_snp(self, value: bool) -> Self
pub const fn with_snp(self, value: bool) -> Self
Snoop behavior (bit 11, ignored by emulator).
Bits: 11..12
Sourcepub const fn set_snp(&mut self, value: bool)
pub const fn set_snp(&mut self, value: bool)
Snoop behavior (bit 11, ignored by emulator).
Bits: 11..12
Sourcepub const fn set_snp_checked(&mut self, value: bool) -> Result<(), ()>
pub const fn set_snp_checked(&mut self, value: bool) -> Result<(), ()>
Snoop behavior (bit 11, ignored by emulator).
Bits: 11..12
Sourcepub const fn address(&self) -> u64
pub const fn address(&self) -> u64
Address bits [51:12] — next-level table or page frame address.
Bits: 12..52
Sourcepub const fn with_address_checked(self, value: u64) -> Result<Self, ()>
pub const fn with_address_checked(self, value: u64) -> Result<Self, ()>
Address bits [51:12] — next-level table or page frame address.
Bits: 12..52
Sourcepub const fn with_address(self, value: u64) -> Self
pub const fn with_address(self, value: u64) -> Self
Address bits [51:12] — next-level table or page frame address.
Bits: 12..52
Sourcepub const fn set_address(&mut self, value: u64)
pub const fn set_address(&mut self, value: u64)
Address bits [51:12] — next-level table or page frame address.
Bits: 12..52
Source§impl SlPte
impl SlPte
Sourcepub fn is_present(&self) -> bool
pub fn is_present(&self) -> bool
Check if this entry is present (R or W is set).
For DMA remapping, an entry is present if any of R or W is set. The X bit is ignored for second-level entries.
Sourcepub fn phys_address(&self) -> u64
pub fn phys_address(&self) -> u64
Get the full physical address from the address field (bits 51:12 shifted).
Sourcepub fn iova_index(iova: u64, level: u8) -> usize
pub fn iova_index(iova: u64, level: u8) -> usize
Compute the page table entry index for a given IOVA and level.
Extracts the 9-bit index from iova at the bit range for level:
(iova >> shift) & 0x1FF, where shift = 12 + (level - 1) * 9.
Level 1: bits 20:12 (shift=12) Level 2: bits 29:21 (shift=21) Level 3: bits 38:30 (shift=30) Level 4: bits 47:39 (shift=39)
Sourcepub fn page_size_at_level(level: u8) -> u64
pub fn page_size_at_level(level: u8) -> u64
Get the page size at a given level (when PS=1 for large pages).
Level 1: 4KB, Level 2: 2MB, Level 3: 1GB.
Sourcepub fn large_page_gpa(&self, iova: u64, level: u8) -> u64
pub fn large_page_gpa(&self, iova: u64, level: u8) -> u64
Compute the GPA for a large page mapping at the given level.
Masks the page frame address to the level alignment and adds the offset from the IOVA within the page.
Trait Implementations§
Source§impl FromBytes for SlPtewhere
u64: FromBytes,
impl FromBytes for SlPtewhere
u64: FromBytes,
§fn ref_from_bytes(
source: &[u8],
) -> Result<&Self, ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: KnownLayout + Immutable,
fn ref_from_bytes(
source: &[u8],
) -> Result<&Self, ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: KnownLayout + Immutable,
§fn ref_from_prefix(
source: &[u8],
) -> Result<(&Self, &[u8]), ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: KnownLayout + Immutable,
fn ref_from_prefix(
source: &[u8],
) -> Result<(&Self, &[u8]), ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: KnownLayout + Immutable,
§fn ref_from_suffix(
source: &[u8],
) -> Result<(&[u8], &Self), ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: Immutable + KnownLayout,
fn ref_from_suffix(
source: &[u8],
) -> Result<(&[u8], &Self), ConvertError<AlignmentError<&[u8], Self>, SizeError<&[u8], Self>, Infallible>>where
Self: Immutable + KnownLayout,
&Self. Read more§fn mut_from_bytes(
source: &mut [u8],
) -> Result<&mut Self, ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
fn mut_from_bytes(
source: &mut [u8],
) -> Result<&mut Self, ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
§fn mut_from_prefix(
source: &mut [u8],
) -> Result<(&mut Self, &mut [u8]), ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
fn mut_from_prefix(
source: &mut [u8],
) -> Result<(&mut Self, &mut [u8]), ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
§fn mut_from_suffix(
source: &mut [u8],
) -> Result<(&mut [u8], &mut Self), ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
fn mut_from_suffix(
source: &mut [u8],
) -> Result<(&mut [u8], &mut Self), ConvertError<AlignmentError<&mut [u8], Self>, SizeError<&mut [u8], Self>, Infallible>>where
Self: IntoBytes + KnownLayout,
Source§impl FromZeros for SlPtewhere
u64: FromZeros,
impl FromZeros for SlPtewhere
u64: FromZeros,
§fn new_zeroed() -> Selfwhere
Self: Sized,
fn new_zeroed() -> Selfwhere
Self: Sized,
Self from zeroed bytes. Read more§fn new_box_zeroed() -> Result<Box<Self>, AllocError>where
Self: Sized,
fn new_box_zeroed() -> Result<Box<Self>, AllocError>where
Self: Sized,
Box<Self> from zeroed bytes. Read more§fn new_vec_zeroed(len: usize) -> Result<Vec<Self>, AllocError>where
Self: Sized,
fn new_vec_zeroed(len: usize) -> Result<Vec<Self>, AllocError>where
Self: Sized,
Vec<Self> from zeroed bytes. Read moreSource§impl IntoBytes for SlPtewhere
u64: IntoBytes,
impl IntoBytes for SlPtewhere
u64: IntoBytes,
§fn as_mut_bytes(&mut self) -> &mut [u8] ⓘwhere
Self: FromBytes,
fn as_mut_bytes(&mut self) -> &mut [u8] ⓘwhere
Self: FromBytes,
§fn write_to(&self, dst: &mut [u8]) -> Result<(), SizeError<&Self, &mut [u8]>>where
Self: Immutable,
fn write_to(&self, dst: &mut [u8]) -> Result<(), SizeError<&Self, &mut [u8]>>where
Self: Immutable,
Source§impl KnownLayout for SlPtewhere
Self: Sized,
impl KnownLayout for SlPtewhere
Self: Sized,
Source§type PointerMetadata = ()
type PointerMetadata = ()
Self. Read more§fn size_for_metadata(meta: Self::PointerMetadata) -> Option<usize>
fn size_for_metadata(meta: Self::PointerMetadata) -> Option<usize>
Self with the given pointer
metadata. Read more