Struct GenericPcieSwitch 

pub struct GenericPcieSwitch { /* private fields */ }

A PCI Express switch emulator that implements a complete switch with upstream and downstream ports.

A PCIe switch consists of:

• One upstream switch port that connects to the parent (root port or another switch)
• Multiple downstream switch ports that connect to children (endpoints or other switches)

The switch implements routing functionality to forward configuration space accesses between the upstream and downstream ports based on bus number assignments.

Implementations

impl GenericPcieSwitch

pub fn new(definition: GenericPcieSwitchDefinition) -> Self

Constructs a new GenericPcieSwitch emulator.

pub fn name(&self) -> &Arc<str>

Get the name of this switch.

pub fn upstream_port(&self) -> &UpstreamSwitchPort

Get a reference to the upstream switch port.

pub fn downstream_ports(&self) -> Vec<DownstreamPortInfo>

Enumerate the downstream ports of the switch.

pub fn add_pcie_device( &mut self, port_devfn: u8, name: &str, dev: Box<dyn GenericPciBusDevice>, ) -> Result<()>

Attach the provided GenericPciBusDevice to the port identified.

Trait Implementations

impl ChangeDeviceState for GenericPcieSwitch

fn start(&mut self)

No-op start hook: switch state is fully modeled in config-space state.

async fn stop(&mut self)

No-op stop hook: no background tasks or external resources to drain.

async fn reset(&mut self)

Resets upstream and downstream bridge config-space state to power-on defaults.

impl ChipsetDevice for GenericPcieSwitch

fn supports_pci(&mut self) -> Option<&mut dyn PciConfigSpace>

Exposes this switch as a PCI config-space device to the chipset bus.

fn supports_pio(&mut self) -> Option<&mut (dyn PortIoIntercept + 'static)>

Optionally returns a trait object to send IO port intercepts to.

fn supports_mmio(&mut self) -> Option<&mut (dyn MmioIntercept + 'static)>

Optionally returns a trait object to send MMIO port intercepts to.

fn supports_poll_device(&mut self) -> Option<&mut dyn PollDevice>

Optionally returns a trait object to send poll requests to.

fn supports_line_interrupt_target( &mut self, ) -> Option<&mut dyn LineInterruptTarget>

Optionally returns a trait object to send interrupt line changes to.

fn supports_handle_eoi(&mut self) -> Option<&mut dyn HandleEoi>

Optionally returns a trait object to send EOI requests to.

fn supports_acknowledge_pic_interrupt( &mut self, ) -> Option<&mut dyn AcknowledgePicInterrupt>

Optionally returns a trait object with which to acknowledge PIC interrupts.

fn supports_tdisp(&mut self) -> Option<&mut dyn TdispHostDeviceTarget>

Optionally returns a trait object which implements TDISP host communication.

impl InspectMut for GenericPcieSwitch

fn inspect_mut(&mut self, req: Request<'_>)

Inspects the object.

impl PciConfigSpace for GenericPcieSwitch

fn pci_cfg_read(&mut self, offset: u16, value: &mut u32) -> IoResult

Reads the switch’s own upstream-port config space (Type 0 view).

fn pci_cfg_write(&mut self, offset: u16, value: u32) -> IoResult

Writes the switch’s own upstream-port config space (Type 0 view).

fn pci_cfg_read_with_routing( &mut self, secondary_bus: u8, target_bus: u8, function: u8, offset: u16, value: &mut u32, ) -> IoResult

Handle a PCI configuration space read with full routing context.

fn pci_cfg_write_with_routing( &mut self, secondary_bus: u8, target_bus: u8, function: u8, offset: u16, value: u32, ) -> IoResult

Handle a PCI configuration space write with full routing context.

fn suggested_bdf(&mut self) -> Option<(u8, u8, u8)>

Check if the device has a suggested (bus, device, function) it expects to be located at.

impl SaveRestore for GenericPcieSwitch

type SavedState = SavedState

The concrete saved state type.

fn save(&mut self) -> Result<Self::SavedState, SaveError>

Saves the object’s state.

fn restore(&mut self, state: Self::SavedState) -> Result<(), RestoreError>

Restores the object’s state.