Struct McgCap

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pub struct McgCap(/* private fields */);

Expand description

X86X_MSR_MCG_CAP (MSR 0x179): global machine-check capability register.

Layout per the Intel SDM Volume 3B, Section 18.3.1.1 / Figure 18-2 (doc 325384-092).

Implementations§

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impl McgCap

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pub const fn new() -> Self

Creates a new default initialized bitfield.

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pub const fn from_bits(bits: u64) -> Self

Convert from bits.

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pub const fn into_bits(self) -> u64

Convert into bits.

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pub const fn count(&self) -> u8

Number of hardware unit error-reporting banks.

Bits: 0..8

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pub const fn with_count_checked(self, value: u8) -> Result<Self, ()>

Number of hardware unit error-reporting banks.

Bits: 0..8

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pub const fn with_count(self, value: u8) -> Self

Number of hardware unit error-reporting banks.

Bits: 0..8

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pub const fn set_count(&mut self, value: u8)

Number of hardware unit error-reporting banks.

Bits: 0..8

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pub const fn set_count_checked(&mut self, value: u8) -> Result<(), ()>

Number of hardware unit error-reporting banks.

Bits: 0..8

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pub const fn ctl_p(&self) -> bool

MCG_CTL_P: IA32_MCG_CTL MSR is present.

Bits: 8..9

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pub const fn with_ctl_p_checked(self, value: bool) -> Result<Self, ()>

MCG_CTL_P: IA32_MCG_CTL MSR is present.

Bits: 8..9

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pub const fn with_ctl_p(self, value: bool) -> Self

MCG_CTL_P: IA32_MCG_CTL MSR is present.

Bits: 8..9

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pub const fn set_ctl_p(&mut self, value: bool)

MCG_CTL_P: IA32_MCG_CTL MSR is present.

Bits: 8..9

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pub const fn set_ctl_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_CTL_P: IA32_MCG_CTL MSR is present.

Bits: 8..9

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pub const fn ext_p(&self) -> bool

MCG_EXT_P: extended machine-check state MSRs (at 0x180) are present.

Bits: 9..10

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pub const fn with_ext_p_checked(self, value: bool) -> Result<Self, ()>

MCG_EXT_P: extended machine-check state MSRs (at 0x180) are present.

Bits: 9..10

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pub const fn with_ext_p(self, value: bool) -> Self

MCG_EXT_P: extended machine-check state MSRs (at 0x180) are present.

Bits: 9..10

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pub const fn set_ext_p(&mut self, value: bool)

MCG_EXT_P: extended machine-check state MSRs (at 0x180) are present.

Bits: 9..10

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pub const fn set_ext_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_EXT_P: extended machine-check state MSRs (at 0x180) are present.

Bits: 9..10

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pub const fn cmci_p(&self) -> bool

MCG_CMCI_P: corrected MC error counting/signaling extension present.

Bits: 10..11

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pub const fn with_cmci_p_checked(self, value: bool) -> Result<Self, ()>

MCG_CMCI_P: corrected MC error counting/signaling extension present.

Bits: 10..11

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pub const fn with_cmci_p(self, value: bool) -> Self

MCG_CMCI_P: corrected MC error counting/signaling extension present.

Bits: 10..11

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pub const fn set_cmci_p(&mut self, value: bool)

MCG_CMCI_P: corrected MC error counting/signaling extension present.

Bits: 10..11

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pub const fn set_cmci_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_CMCI_P: corrected MC error counting/signaling extension present.

Bits: 10..11

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pub const fn tes_p(&self) -> bool

MCG_TES_P: threshold-based error status present.

Bits: 11..12

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pub const fn with_tes_p_checked(self, value: bool) -> Result<Self, ()>

MCG_TES_P: threshold-based error status present.

Bits: 11..12

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pub const fn with_tes_p(self, value: bool) -> Self

MCG_TES_P: threshold-based error status present.

Bits: 11..12

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pub const fn set_tes_p(&mut self, value: bool)

MCG_TES_P: threshold-based error status present.

Bits: 11..12

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pub const fn set_tes_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_TES_P: threshold-based error status present.

Bits: 11..12

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pub const fn seam_nr_p(&self) -> bool

MCG_SEAM_NR_P: IA32_MCG_STATUS.SEAM_NR (bit 12) is supported.

Bits: 12..13

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pub const fn with_seam_nr_p_checked(self, value: bool) -> Result<Self, ()>

MCG_SEAM_NR_P: IA32_MCG_STATUS.SEAM_NR (bit 12) is supported.

Bits: 12..13

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pub const fn with_seam_nr_p(self, value: bool) -> Self

MCG_SEAM_NR_P: IA32_MCG_STATUS.SEAM_NR (bit 12) is supported.

Bits: 12..13

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pub const fn set_seam_nr_p(&mut self, value: bool)

MCG_SEAM_NR_P: IA32_MCG_STATUS.SEAM_NR (bit 12) is supported.

Bits: 12..13

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pub const fn set_seam_nr_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_SEAM_NR_P: IA32_MCG_STATUS.SEAM_NR (bit 12) is supported.

Bits: 12..13

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pub const fn ext_cnt(&self) -> u8

MCG_EXT_CNT: number of extended machine-check state registers (meaningful only when ext_p is set).

Bits: 16..24

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pub const fn with_ext_cnt_checked(self, value: u8) -> Result<Self, ()>

MCG_EXT_CNT: number of extended machine-check state registers (meaningful only when ext_p is set).

Bits: 16..24

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pub const fn with_ext_cnt(self, value: u8) -> Self

MCG_EXT_CNT: number of extended machine-check state registers (meaningful only when ext_p is set).

Bits: 16..24

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pub const fn set_ext_cnt(&mut self, value: u8)

MCG_EXT_CNT: number of extended machine-check state registers (meaningful only when ext_p is set).

Bits: 16..24

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pub const fn set_ext_cnt_checked(&mut self, value: u8) -> Result<(), ()>

MCG_EXT_CNT: number of extended machine-check state registers (meaningful only when ext_p is set).

Bits: 16..24

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pub const fn ser_p(&self) -> bool

MCG_SER_P: software error recovery is supported.

Bits: 24..25

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pub const fn with_ser_p_checked(self, value: bool) -> Result<Self, ()>

MCG_SER_P: software error recovery is supported.

Bits: 24..25

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pub const fn with_ser_p(self, value: bool) -> Self

MCG_SER_P: software error recovery is supported.

Bits: 24..25

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pub const fn set_ser_p(&mut self, value: bool)

MCG_SER_P: software error recovery is supported.

Bits: 24..25

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pub const fn set_ser_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_SER_P: software error recovery is supported.

Bits: 24..25

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pub const fn emc_p(&self) -> bool

MCG_EMC_P: enhanced machine-check capability (firmware-first signaling) is supported.

Bits: 25..26

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pub const fn with_emc_p_checked(self, value: bool) -> Result<Self, ()>

MCG_EMC_P: enhanced machine-check capability (firmware-first signaling) is supported.

Bits: 25..26

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pub const fn with_emc_p(self, value: bool) -> Self

MCG_EMC_P: enhanced machine-check capability (firmware-first signaling) is supported.

Bits: 25..26

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pub const fn set_emc_p(&mut self, value: bool)

MCG_EMC_P: enhanced machine-check capability (firmware-first signaling) is supported.

Bits: 25..26

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pub const fn set_emc_p_checked(&mut self, value: bool) -> Result<(), ()>

MCG_EMC_P: enhanced machine-check capability (firmware-first signaling) is supported.

Bits: 25..26

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