Struct AmdIommuIvrsConfig 

pub struct AmdIommuIvrsConfig {
    pub pa_size: u8,
    pub va_size: u8,
    pub iommus: Vec<AmdIommuAcpiConfig>,
    pub ioapic_rid: Option<u16>,
}

IVRS-level configuration for AMD IOMMU ACPI table generation.

Groups the IVRS header fields (PA/VA sizes) with the per-IOMMU configs.

Fields

pa_size: u8

Physical address size in bits (e.g. 48). Written to the IVRS IVinfo header.

va_size: u8

Virtual address size in bits (e.g. 48). Written to the IVRS IVinfo header.

iommus: Vec<AmdIommuAcpiConfig>

Per-IOMMU configurations, one per root complex with an AMD IOMMU.

ioapic_rid: Option<u16>

IOAPIC PCIe Requester ID (RID) for the IVRS DEV_SPECIAL(IOAPIC) entry.

When set, a DEV_SPECIAL(IOAPIC) entry is added to the IVHD whose segment (0) and bus range cover this RID, so the guest can locate the IOAPIC’s DTE/IRTE context for interrupt remapping.

Trait Implementations

impl Clone for AmdIommuIvrsConfig

fn clone(&self) -> AmdIommuIvrsConfig

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for AmdIommuIvrsConfig

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.