Enum AcpiArchConfig 

pub enum AcpiArchConfig {
    X86 {
        with_ioapic: bool,
        with_pic: bool,
        with_pit: bool,
        with_psp: bool,
        pm_base: u16,
        acpi_irq: u32,
        iommu: Option<X86IommuAcpiConfig>,
    },
    Aarch64 {
        hypervisor_vendor_identity: u64,
        virt_timer_ppi: u32,
        smmu: Vec<AcpiSmmuConfig>,
    },
}

Architecture-specific ACPI configuration carried by AcpiTablesBuilder.

Variants

X86

x86-specific settings (IOAPIC, PIC, PIT, PSP, PM base, SCI IRQ).

Fields

with_ioapic: bool

If an IOAPIC is present.

with_pic: bool

If a PIC is present.

with_pit: bool

If a PIT is present.

with_psp: bool

If a PSP is present.

pm_base: u16

Base address of dynamic power management device registers.

acpi_irq: u32

ACPI IRQ number.

iommu: Option<X86IommuAcpiConfig>

x86 IOMMU ACPI table configuration. Generates an IVRS (AMD) or DMAR (Intel VT-d) table when set. At most one x86 IOMMU type is active per VM.

Aarch64

ARM64-specific settings (HW_REDUCED_ACPI FADT).

Fields

hypervisor_vendor_identity: u64

Hypervisor vendor identity for the FADT. Zero when not running under a hypervisor.

virt_timer_ppi: u32

Virtual timer PPI (GIC INTID).

smmu: Vec<AcpiSmmuConfig>

SMMUv3 instances. Each entry adds an SMMUv3 IORT node for the specified PCI segment. Empty means no SMMU.