pub struct LocalApic { /* private fields */ }
Expand description
An individual local APIC for a processor.
Implementations§
Source§impl LocalApic
impl LocalApic
Sourcepub fn access<'a, T: ApicClient>(
&'a mut self,
client: &'a mut T,
) -> LocalApicAccess<'a, T>
pub fn access<'a, T: ApicClient>( &'a mut self, client: &'a mut T, ) -> LocalApicAccess<'a, T>
Returns an object to access APIC registers.
Sourcepub fn request_fixed_interrupts(&mut self, irr: [u32; 8])
pub fn request_fixed_interrupts(&mut self, irr: [u32; 8])
Fast path for updating IRR on the local processor.
Sourcepub fn base_address(&self) -> Option<u64>
pub fn base_address(&self) -> Option<u64>
Gets the APIC base address, if the APIC is enabled and in xapic mode.
Sourcepub fn set_apic_base(&mut self, apic_base: u64) -> Result<(), InvalidApicBase>
pub fn set_apic_base(&mut self, apic_base: u64) -> Result<(), InvalidApicBase>
Sets the APIC base MSR.
Returns false if the value is invalid.
Sourcepub fn x2apic_enabled(&self) -> bool
pub fn x2apic_enabled(&self) -> bool
X2APIC is enabled on this local APIC
Sourcepub fn scan(&mut self, vmtime: &mut VmTimeAccess, scan_irr: bool) -> ApicWork
pub fn scan(&mut self, vmtime: &mut VmTimeAccess, scan_irr: bool) -> ApicWork
Scans for pending interrupts.
Sourcepub fn push_to_offload(
&mut self,
update: impl FnOnce(&[u32; 8], &[u32; 8], &[u32; 8]),
) -> Result<(), OffloadNotSupported>
pub fn push_to_offload( &mut self, update: impl FnOnce(&[u32; 8], &[u32; 8], &[u32; 8]), ) -> Result<(), OffloadNotSupported>
Handles APIC offload, calling update
with new bits in IRR, ISR, and
the current value of TMR.
update
should accumulate IRR and ISR into the offload APIC page and
update the EOI exit bitmap if TMR has changed since the last call.
update
will not be called if there are no changes (i.e. if IRR and ISR
are both zero).
Sourcepub fn is_offloaded(&self) -> bool
pub fn is_offloaded(&self) -> bool
Returns whether APIC offload is enabled.
Sourcepub fn can_offload_irr(&self) -> bool
pub fn can_offload_irr(&self) -> bool
Returns true if it is safe to set an IRR bit directly in offloaded APIC state.
Sourcepub fn enable_offload(&mut self)
pub fn enable_offload(&mut self)
Enables APIC offload.
Sourcepub fn disable_offload(&mut self, irr: &[u32; 8], isr: &[u32; 8])
pub fn disable_offload(&mut self, irr: &[u32; 8], isr: &[u32; 8])
Disables APIC offload, accumulating IRR and ISR from the offload APIC page.
Sourcepub fn flush(&mut self) -> ApicWork
pub fn flush(&mut self) -> ApicWork
Flushes work as in Self::scan
, but does not poll timers or IRR.
This must be called before Self::save
to flush hidden state to
registers.
Sourcepub fn acknowledge_interrupt(&mut self, vector: u8)
pub fn acknowledge_interrupt(&mut self, vector: u8)
Acknowledges the interrupt returned by scan
.
Sourcepub fn is_lazy_eoi_pending(&self) -> bool
pub fn is_lazy_eoi_pending(&self) -> bool
Returns whether an EOI is pending that can be completed lazily, without intercepting the VP.