IrqFdRoute

Trait IrqFdRoute 

Source
pub trait IrqFdRoute: Send + Sync {
    // Required methods
    fn event(&self) -> &Event;
    fn set_msi(&self, address: u64, data: u32) -> Result<()>;
    fn clear_msi(&self) -> Result<()>;
    fn mask(&self) -> Result<()>;
    fn unmask(&self) -> Result<()>;

    // Provided method
    fn consume_pending(&self) -> bool { ... }
}
Expand description

A handle to a registered irqfd route.

Each route represents a single GSI with an associated event. When the event is signaled (e.g., by VFIO on a device interrupt), the kernel injects the MSI configured via set_msi into the guest.

Dropping this handle unregisters the irqfd and frees the GSI.

Required Methods§

Source

fn event(&self) -> &Event

Returns the event that triggers interrupt injection when signaled.

Pass this to VFIO map_msix or any other interrupt source. On Linux, this is an eventfd created by the implementation. On WHP (future), this is the event handle returned by WHvCreateTrigger.

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fn set_msi(&self, address: u64, data: u32) -> Result<()>

Sets the MSI routing for this irqfd’s GSI.

address and data are the x86 MSI address and data values that the kernel will use when injecting the interrupt into the guest.

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fn clear_msi(&self) -> Result<()>

Clears the MSI routing for this irqfd’s GSI.

The irqfd remains registered but interrupt delivery is disabled until a new route is configured via set_msi.

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fn mask(&self) -> Result<()>

Masks the route.

While masked, interrupts arriving on the event are not injected into the guest. The caller should use consume_pending to check whether an interrupt arrived while masked and store the result in the MSI-X PBA. On unmask, the caller should deliver any pending interrupt from the PBA before re-enabling the route.

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fn unmask(&self) -> Result<()>

Unmasks the route and re-enables interrupt injection.

Provided Methods§

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fn consume_pending(&self) -> bool

Drains the pending interrupt state and returns whether an interrupt was pending.

This atomically reads and clears the event’s counter. The caller should store the result in the MSI-X PBA (Pending Bit Array). Repeated calls after the first drain will return false until a new interrupt arrives, so the caller must persist the pending state externally (e.g., in the MSI-X emulator’s PBA bits).

Implementors§