Struct ConfigSpaceCommonHeaderEmulator 

pub struct ConfigSpaceCommonHeaderEmulator<const N: usize> { /* private fields */ }

Common emulator for shared PCI configuration space functionality. Generic over the number of BARs (6 for Type 0, 2 for Type 1).

Implementations

impl<const N: usize> ConfigSpaceCommonHeaderEmulator<N>

pub fn new( hardware_ids: HardwareIds, capabilities: Vec<Box<dyn PciCapability>>, bars: DeviceBars, ) -> Self

Create a new common header emulator

pub const fn bar_count(&self) -> usize

Get the number of BARs supported by this emulator

pub fn validate_header_type(&self, expected: HeaderType) -> bool

Validate that this emulator has the correct number of BARs for the given header type

pub fn with_multi_function_bit(self, bit: bool) -> Self

If the device is multi-function, enable bit 7 in the Header register.

pub fn set_interrupt_pin( &mut self, pin: PciInterruptPin, line: LineInterrupt, ) -> Arc<IntxInterrupt>

If using legacy INT#x interrupts: wire a LineInterrupt to one of the 4 INT#x pins, returning an object that manages configuration space bits when the device sets the interrupt level.

pub fn reset(&mut self)

Reset the common header state

pub fn hardware_ids(&self) -> &HardwareIds

Get hardware IDs

pub fn capabilities(&self) -> &[Box<dyn PciCapability>]

Get capabilities

pub fn capabilities_mut(&mut self) -> &mut [Box<dyn PciCapability>]

Get capabilities mutably

pub fn multi_function_bit(&self) -> bool

Get multi-function bit

pub const fn header_type(&self) -> HeaderType

Get the header type for this emulator

pub fn command(&self) -> Command

Get current command register state

pub fn base_addresses(&self) -> &[u32; N]

Get current base addresses

pub fn interrupt_line(&self) -> u8

Get current interrupt line

pub fn interrupt_pin(&self) -> u8

Get current interrupt pin (returns the pin number + 1, or 0 if no pin configured)

pub fn set_interrupt_line(&mut self, interrupt_line: u8)

Set interrupt line (for save/restore)

pub fn set_base_addresses(&mut self, base_addresses: &[u32; N])

Set base addresses (for save/restore)

pub fn set_command(&mut self, command: Command)

Set command register (for save/restore)

pub fn sync_command_register(&mut self, command: Command)

Sync command register changes by updating both interrupt and MMIO state

pub fn update_intx_disable(&mut self, disabled: bool)

Update interrupt disable setting

pub fn update_mmio_enabled(&mut self, enabled: bool)

Update MMIO enabled setting and handle BAR mapping

pub fn read_u32(&self, offset: u16, value: &mut u32) -> CommonHeaderResult

Read from the config space. offset must be 32-bit aligned. Returns CommonHeaderResult indicating if handled, unhandled, or failed.

pub fn write_u32(&mut self, offset: u16, val: u32) -> CommonHeaderResult

Write to the config space. offset must be 32-bit aligned. Returns CommonHeaderResult indicating if handled, unhandled, or failed.

pub fn find_bar(&self, address: u64) -> Option<(u8, u16)>

Finds a BAR + offset by address.

pub fn is_pcie_device(&self) -> bool

Check if this device is a PCIe device by looking for the PCI Express capability.

Trait Implementations

impl<const N: usize> Inspect for ConfigSpaceCommonHeaderEmulator<N>

fn inspect(&self, req: Request<'_>)

Inspects the object.

impl<const N: usize> SaveRestore for ConfigSpaceCommonHeaderEmulator<N>

type SavedState = SavedState

The concrete saved state type.

fn save(&mut self) -> Result<Self::SavedState, SaveError>

Saves the object’s state.

fn restore(&mut self, state: Self::SavedState) -> Result<(), RestoreError>

Restores the object’s state.