Struct Dsdt 

pub struct Dsdt { /* private fields */ }

Implementations

impl Dsdt

pub fn new() -> Self

pub fn to_bytes(&self) -> Vec<u8>

pub fn add_object(&mut self, obj: &impl AmlObject)

pub fn add_apic(&mut self)

Add an APIC device to the DSDT with the following ASL code:

Device(\_SB.APIC)
{
    Name(_HID, EISAID("PNP0003"))
    Name(_CRS,
        ResourceTemplate()
        {
            Memory32Fixed(ReadWrite, 0xfee00000, 0x1000)
            Memory32Fixed(ReadWrite, 0xfec00000, 0x1000)
        })
}

pub fn add_uart( &mut self, name: &[u8], ddn: &[u8], uid: u64, io_base: u16, irq: u32, )

Add a 16650A compatible UART to the DSDT with the following ASL code:

Device(<name>)
{
    Name(_HID, EISAID("PNP0501")) // 16550A-compatible COM port
    Name(_DDN, <ddn>)
    Name(_UID, <uid>)
    Name(_CRS, ResourceTemplate()
    {
        IO(Decode16, <io_base>, <io_base>, 1, 8)
        Interrupt(ResourceConsumer, Edge, ActiveHigh, Exclusive)
            {<irq>}
    })
}

pub fn add_sbsa_uart( &mut self, name: &[u8], uid: u64, base_addr: u64, size: u64, gsiv: u32, )

Add an ARM SBSA Generic UART to the DSDT for ACPI-based boot.

Device(<name>)
{
    Name(_HID, "ARMH0011")
    Name(_UID, <uid>)
    Name(_CRS, ResourceTemplate()
    {
        QWORDMemory(..., <base_addr>, <size>)
        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive)
            {<gsiv>}
    })
}

pub fn add_mmio_module(&mut self, low: MemoryRange, high: MemoryRange)

Add an ACPI module device to describe the low and high MMIO regions. This is used when PCI is not present so that VMBus can find MMIO space.

Device(\_SB.VMOD)
{
    Name(_HID, "ACPI0004")
    Name(_UID, 0)
    Name(_CRS, ResourceTemplate()
    {
        // Low gap
        QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
        // Granularity Min          Max T       Translation Range (Length = Max-Min+1)
            0,         <low_min>,   <low_max>,  0,          <dynamic>,,,
            MEM6)   // Name declaration for this descriptor

        // High gap
        QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
        // Granularity Min          Max T       Translation Range (Length = Max-Min+1)
            0,         <high_min>,  <high_max>, 0,          <dynamic>,,,
            MEM6)   // Name declaration for this descriptor
    })
}

pub fn add_pci( &mut self, low: MemoryRange, high: MemoryRange, legacy_interrupts: &[((u8, Option<u8>), u32)], )

Adds a PCI bus with the specified MMIO ranges.

Device(\_SB.PCI0)
{
    Name(_HID, PNP0A03)
    Name(_CRS, ResourceTemplate()
    {
        WordBusNumber(...) // Bus translation info
        IO(Decode16, 0xcf8, 0xcf8) // IO port
        QWordMemory() // Low gap
        QWordMemory() // High gap
    })
    // PCI routing table
    Name(_PRT, Package{
        Package{<address>, <PCI pin>, 0, <interrupt>},
        ...
    })
}

pub fn add_vmbus(&mut self, in_pci: bool, interrupt_intid: Option<u32>)

Add a VMBUS device to the DSDT.

If in_pci, then enumerate the device under PCI0. Otherwise, enumerate it under the VMOD module created by add_mmio_module.

If interrupt is provided, it is added as an Extended Interrupt resource in _CRS. On ARM64 ACPI, the kernel reads the VMBus interrupt from this.

Device(\_SB.VMOD.VMBS)
{
    Name(STA, 0xF)
    Name(_ADR, 0x00)
    Name(_DDN, "VMBUS")
    Name(_HID, "VMBus")
    Name(_UID, 0)
    Method(_DIS, 0) { And(STA, 0xD, STA) }
    Method(_PS0, 0) { Or(STA, 0xF, STA) }
    Method(_STA, 0)
    {
        return(STA)
    }

    Name(_PS3, 0)
    Name(_CRS, ResourceTemplate() { ... })
}

pub fn add_rtc(&mut self)

Add an RTC device with the following ASL code:

Device(\_SB.RTC0)
{
    Name(_HID, EISAID("PNP0B00")) // AT real-time clock
    Name(_UID, 0)
    Name(_CRS, ResourceTemplate()
    {
        IO(Decode16, 0x70, 0x70, 0, 0x2)
        Interrupt(ResourceConsumer, Edge, ActiveHigh, Exclusive) {8}
    })
}