Expand description
Methods to construct page tables on Aarch64.
Structs§
- aarch64 MAIR_EL1 register, provides indices to use in the PTEs for memory types
Enums§
- Some memory attributes. Refer to the ARM VMSA manual for further details and other types.
- Legal indexes for memory attributes for aarch64 PTEs.
Functions§
- Build a set of Aarch64 page tables identity mapping the given region.